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Digital Electronics
NUMBER SYSTEM
BINARY CODES
BOOLEAN ALGEBRA
K MAPS
COMBINATIONAL CKT
SEQUENTIAL CIRCUITS
INTRODUCTION
CLOCK
BISTABLE MULTIVIBRATOR
DERIVATION of FLIPFLOP circuit
RS FLIPFLOP
RS FLIPFLOP(NAND IMPLEMENTATION)
R'S' FLIPFLOP
Clocking RS LATCH
Other LATCHes
Timing problem in LATCHES
MORE QUESTIONS
TIMING CIRCUITS

 

USING K-MAPS TO DESIGN COUNTER

Q- Design MOD-3 ripple counter using (a) Observing outputs (b) K-maps to design the circuit.

Ans: (a)We can design the MOD 3 counter using 2 FFs as 3 is less than 4 i.e. 22 and greater than 2. We can see directly that as we have to reset the counter only after 2 i.e. when output is 3 we reset the counter and hence we need to reset only when we have Q0= 1 & Q1=1. Now firstly design MOD-4 counter using 2 FFs and then take NAND of Q0 & Q1 and feed the output to CLEAR of both FFs.

(b) We firstly draw state diagram of the counter required as:

And we have the general circuit to design the other than MOD 2 n then we have the general circuit as

And now we draw a table to list the different input combinations to Combinational circuit and their corresponding output as:

Q1          Q0                          OUTPUT of reset logic

0              0                              1

0              1                              1

1              0                              1

1              1                              0

 

 

And using K-map as

And hence we get the whole circuit for MOD-3 counter as

 

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