Digital Electronics NUMBER SYSTEM BINARY CODES BOOLEAN ALGEBRA K MAPS COMBINATIONAL CKT SEQUENTIAL CIRCUITS INTRODUCTION CLOCK BISTABLE MULTIVIBRATOR DERIVATION of FLIPFLOP circuit RS FLIPFLOP RS FLIPFLOP(NAND IMPLEMENTATION) R'S' FLIPFLOP Clocking RS LATCH Other LATCHes Timing problem in LATCHES ASYNCHRONUS INPUTS Parameters of CLOCK pulse QUESTIONS(LATCH using MUX) EDGE SENSITIVE LATCH (i.e. FLIPFLOP) MASTER SLAVE FF D FF USING MUX TIMING PARAMETERS OF FF CHARACTERISTIC EQUATIONS OF FFs EXCITATION TABLES OF FF CONVERSION OF 1 FF TO OTHER FF as 1bit MEMORY CELL REGISTERS SHIFT REGISTERS RING COUNTER JOHNSON COUNTER QUESTION(Serial Data transfer) ASYNCHRONOUS COUNTERS RIPPLE COUNTER COUNTER other than MOD-2n Designing COUNTER Using K-MAPS QUESTION(MOD 6 counter) QUESTION(Counter design) DOWN COUNTER QUESTION(Counter design) GLITCH SYNCHRONOUS COUNTER COMPARISON B/W SYNC. & ASYNC. COUNTERS CLOCK SKEW QUESTION(Maximum frequency question) QUESTION(Maximum frequency question) MORE QUESTIONS TIMING CIRCUITS

Counter other than MOD-2n

Q-Can we design a ripple counter other than MOD-2n?

Ans: Yes we can. For this we’ll first design the counter with value which is multiple of 2 but greater than the count required. Then we use a combinational circuit to reset the counter after the required value of count is achieved. Let’s take an example:

Design a MOD-14 counter.

First we design a counter of 2’s multiple greater than 14 which is 16. So we first design a MOD-16 counter as:

Now we need to design a combinational circuit which would take care that counter is reset when count value reaches 13. For this we first draw the waveforms as:

As we have to count till 13 and reset again. We see that when-ever Q4=1, Q3=1 & Q1=1, when have to reset the value of all the flip-flops so that we get the value of count as 0. Hence we take NAND of these 3 variables due to which we get a zero when all 3 variables are 1 and output of NAND gate is connected to all the ACTIVE LOW CLEAR lines to reset all flip-flops as follow. We also have to make sure that the output of this NAND gate is zero only after 13.

And now we the output waveforms as:

And we can clearly observe that we have achieved MOD-14 counter as all count values are reset after 13 but in this method we have to observe the output waveforms and then decide the combinational circuit to reset value after certain count.